The present invention relates to a semiconductor device, having element or cell isolation regions and particularly to a semiconductor device effectively utilizing an element isolation region formed of a semiconductor of one conductivity type and a process for producing the same.
The semiconductor device of the present invention is applicable to, for example, a photoelectric converter of the type in which carriers generated by photoexcitation are stored and a stored voltage generated by the stored carriers is read out.
A photoelectric converter has been proposed by our research group in U.S. patent application Ser. No. 625,130 as shown in FIGS. 1(a) and 1(b), of which FIG. 1(a) is a plan view of the photoelectric converter comprising photosensor cells arranged two-dimensionally and FIG. 1(b) is a sectional view taken along the line A-A' in FIG. 1(a).
Referring to FIGS. 1(a) and 1(b), photosensor cells are arranged on an n.sup.+ silicon substrate 101, and each photosensor cell is electrically isolated from a neighboring photosensor cell by a cell or element isolation region 102 formed of SiO.sub.2, Si.sub.3 N.sub.4, polysilicon, etc.
Each photosensor cell is constituted by an n.sup.- region 103 with a low impurity concentration, a p region 104 formed thereon and doped with a p-type impurity (e.g., boron) forming a base of a bipolar transistor and also a source of a p-channel MOS transistor, a p region 105 formed also on the n.sup.- region 103 and forming a drain of the p-channel MOS transistor, an n.sup.+ region forming an emitter of the bipolar transistor, a gate electrode 108 of the p-channel MOS transistor formed through an oxide film 107, a MOS capacitor electrode for applying pulses to the p region 104 through the oxide film 107, an emitter electrode 110, and an electrode 111 for imparting a predetermined potential to the p region 105, as main parts thereof.
The photosensor cell operates in the following manner.
First, in the charge storage operation, the base p region 104 is biased to a negative potential relative to the n.sup.+ region 106, thereby to store therein holes generated by incident light. As the holes are accumulated, the potential of the p region is changed in the positive direction, while the resultant potential varies depending on the intensity of the light incident on each photosensor cell.
The readout operation is then carried out. More specifically, when a readout pulse voltage V.sub.R is applied to the MOS capacitor electrode, the potential of the p region becomes positive and the light information stored is read out to the emitter n.sup.+ region 106. Then, the readout pulse voltage is changed to a ground potential, whereby the information is output from the n.sup.+ region 106 through the emitter electrode 110 to the exterior.
Then, in the state where the potential of the p region 104 varies depending on the intensity of the incident light, a negative pulse is applied to the gate electrode 108 to effect a refreshing operation. By the negative pulse, the p channel MOS transistor is turned on, whereby the holes stored in the p region 104 are removed and p region 104 is brought to and fixed at a predetermined negative potential. Thus, by this refreshing operation, the p region 104 which is a base is completely initialized. Thereafter, the above-mentioned storage, readout and refreshing operations are respectively repeated.
In this manner, by fixing the base p region 104 at a predetermined negative potential during the refreshing operation, the light information is erased completely and at a high speed regardless of whether the light is strong or weak.
However, it is particularly desired in a photoelectric converter that the device area is utilized to the maximum in order to satisfy the requirement for improvement in photosensitivity and higher resolution.
In this respect, the photoelectric converter as described above has left room for further improvement. More specifically, because the device shown in FIG. 1 has a cell isolation region 102 formed of an insulating material, it becomes larger by the area of the region 102 and moreover is required to be provided with a particular line for applying a negative voltage to one main electrode region 105 of the p-channel MOS transistor which is turned on during the refreshing step.
On the other hand, when a cell isolation region of a semiconductor is formed throughout a chip with a width of 2 to 4 .mu.m, the resistivity becomes 2500 to 5000 times the sheet resistivity, whereby there arises a problem that a potential distribution is generated. When the cell isolation region is more deeply formed, the width becomes larger likewise, thus increasing the loss of device area.
Furthermore, as an independent step for providing a cell isolation region of an insulating material is required, the overall production process becomes complicated particularly when peripheral devices or elements are formed on the same chip.